Xenos (GPU)

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Revision as of 04:10, 29 March 2010 by imported>Bertl (Created page with '== Custom ATI (Xenos) ATI R500 based Graphics Processor (90/80/65nm Process) ==       * 325 Million transistors (235m Parent Die / 90m Daughter Die) (Other specs say 337 milli…')
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Custom ATI (Xenos) ATI R500 based Graphics Processor (90/80/65nm Process)

     

  • 325 Million transistors (235m Parent Die / 90m Daughter Die) (Other specs say 337 million total)
  • GPU & Northbridge (Northbridge on Parent Die)
  • Two-die design, with two chips in a single package on a single substrate
    • Parent die contains the GPU and memory controller
    • Daughter die consists of the 10MB of eDRAM & additional logic (FSAA, Alpha, ZLogic & Stencil)
    • 2GHz link between the parent and daughter die
  • 500MHz processor
  • 10 MB of embedded DRAM (By NEC)
  • 48-way parallel floating-point dynamically scheduled shader pipelines
    • 4 ALU's per pipe for Vertex or Pixel Shader processing
  • Unified shader architecture (Beyond Shader Model 3.0)
  • Three SIMD engines with 16 processors per unit (The 48 shader pipeline) 
  • 16 Filtered & 16 unfiltered texture samples per clock
  • HDR Rendering
  • DirectX 9
  • Limited support for DirectX 10
  • Handles all scaling of video (resolution).