Modesetting

We know libxenon sets graphics modes by writing a complete Ana dump to Ana memory and writing some values to the GPU registers. The registers affected and the information that gets written is the following:

total_width, hsync_offset, real_active_width, total_height, vsync_offset, active_height, width, height,

is_progressive = 0 for non progressive modes, 1 for progressive modes.

rgb = 1, only declared on the modes used through VGA.

composite_sync=1, only declared on the PAL/NTSC non progresive modes.

interlace_factor is set to 1 when mode is progressive and 2 when it is not.

FB_BASE is a constant for the framebuffer base address

These are the addresses that get that variables written at some stage of the initialization, in the order libxenon write them. I have take out the addresses that get fixed values written. As you can see, some addresses get written more than one time on the initialization process.

0x6000, mode->total_width - 1

0x6010, mode->total_height - 1

0x6004, (mode->hsync_offset << 16) | (mode->real_active_width + mode->hsync_offset)

0x6014, (mode->vsync_offset << 16) | (mode->active_height * interlace_factor + mode->vsync_offset)

0x6030, mode->is_progressive ? 0 : 1

0x6120, mode->width

0x6134, mode->width

0x6138, mode->active_height * interlace_factor

0x6110, FB_BASE

0x6120, mode->width

0x2840, FB_BASE

0x2844, mode->width , I don't know what hardware is in charge on this memory addresses

0x6584, (mode->width << 16) | (mode->active_height * interlace_factor)

0x65e8, (mode->width >> 2) - 1

0x6528, mode->is_progressive ? 0 : 1

0x6584, (mode->width << 16) | (mode->height * interlace_factor)

0x65e8, (mode->width / 4) - 1

0x6434, mode->width

0x6138, mode->height * interlace_factor